Digital System Design — DU B. Sc. (Hons) Electronics Previous Year Question Papers

Programme
B. Sc. (Hons) Electronics
Paper type
GE
Paper code
2514001201
Exam years
2024–2026

Digital System Design is a GE paper in Semester I of B. Sc. (Hons) Electronics at Delhi University (paper code 2514001201). 3 previous year question papers from 2024–2026 are listed below; view or download each original PDF.

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2026 question papers

2025 question papers

2024 question papers

What was asked in the 2026 Digital System Design paper?

Text of the may june 2026 DU question paper (UPC 2514001201), so you can see what gets asked before opening a PDF.

Attempt five questions in all. 1. (a) Find 2’s complement of binary number 10110010. (b) (c) (d) (e) (f) Convert the decimal number 9673 to BCD. What are the applications of Gray Code? Develop the truth table for a 3-input AND gate. Distinguish between a Combinational and Sequential logic. Explain the difference between synchronous and asynchronous counters. What is meant by modulus of a counter? 2. (a) (b) (c) Express the decimal number –25 as an 8-bit number in:- (i) sign-magnitude form (ii) 1’s complement form (iii) 2’s complement form Construct OR and EX-OR gates using NAND gates. Convert octal number 623.77 into equivalent:- (i) decimal number (ii) hexadecimal number (iii) binary number 3. (a) (b) (c) Simplify below Boolean function using K-map and realize using logic gates:-f(A, B, C, D) = Σm (0,1,2,4,6,8,10,12,13,14,15) Develop a truth table for the standard SOP expression:- Describe derived logic gates (NAND, NOR, XOR, XNOR) and explain the universal property of NAND and NOR gates. (a) Using Boolean algebraic techniques, simplify the following expression and implement using logic gates:- (b) Perform the following operations:- (i) Convert the decimal number 2469₁₀ to BCD (ii) Convert the hexadecimal number CF8E₁₆ to binary number (c) Prove the Boolean algebraic theorem using truth table approach What are Half Adder and Full Adder? Give Circuits for both using basic Implement a Full Adder using 3 to 8 decoder and logic gates. What is meant by Encoder? Design and explain an octal to binary Encoder using OR gates. 6. (a) (b) (c) Write down VHDL program for a 3 to 8 line Decoder. Explain briefly BCD to seven-segment Decoder. What is meant by Edge Triggering? Differentiate between a positive and negative edge triggered Flip-Flop giving suitable example. Design a decade asynchronous Counter and explain its working with timing diagram. With logic diagram, explain working of a 4-bit Serial In -Serial Out Shift

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Frequently asked questions

Where can I download the DU Digital System Design previous year question paper PDF?
This page lists 3 Digital System Design question papers for B. Sc. (Hons) Electronics at Delhi University (2024–2026). Open any paper to view the original PDF or download it. It is free and needs no login.
Which years of Digital System Design question papers are available?
Digital System Design papers are available for 2026, 2025, 2024.
What is the paper code (UPC) of Digital System Design?
The Unique Paper Code for Digital System Design in B. Sc. (Hons) Electronics is 2514001201.
Which semester is Digital System Design taught in?
Digital System Design is a GE paper in Semester I of B. Sc. (Hons) Electronics, according to DU's published scheme.

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