Computer System Architecture — DU B.Sc. (Hons) Computer Science Previous Year Question Papers

(c) Write the micro-operations for the following instructions 7. (a) Perform the arithmetic operatión (-65) + (-85) with binary numbers in signed-2's complement representation. Usé eight bits to accommodate each number together with its sign. Idehtify, if this operation results in overflow or not. " (6) "(b)' Differentiate between (9) (i) Programmed I/O and Interrupt-initiated (iii) Burst transfer and Cycle stealing in DMA This question paper has two sections A.and B. 3. Section A carries 30 marks, and each question in Section B' carries 15 marks. %. ' Parts of a question must be attempted together. (a) Perform the arithmetic operation (-62) 10. + (71) 10 using 10's complement. (3) (b) Write three differences between GPU and CPU. (e) Why do computer systems require an VO interface? (3) Give any three reasons. (d) Given the 8-bit binary number 0010 1101, perform a left shift (using CIL) by 2 positions. (i) What is the resulting binary value? (i) What is the hexadecimal equivalent before and after shifting? (3) (e) In the general register organization of a computer, a 14-bit control word includes the fields SELA, SELB, and SELD (each 3 bits) for register selection, along with the OPR field. Using this format, show how to implement the micro-operation R2 < R4 + R3, given that the OPR code for addition is 00011 and register numbers are represented using their corresponding binary codes. 6. (a) A processor executes one instruction in 80ns without pipelining. With pipelining, the processor is divided into 6 stages, each requiring 18ns. (i) Find the total execution time for 200 instructions in both pipelined and non-pipelined processors. (ii) Determine the speedup ratio of the (4) pipelined processor. (b) A computer stores a two-word instruction starting at memory address 240. The address field of the instruction is located at 241, and it contains the value 180. The Program Counter (PC) holds 242 (address of the next instruction). The Index Register (XR) contains 25, and Register R2 contains 400. Détermine the Effective Address (EA) for the instruction under the following addressing modes: (i) Direct addressing (i) Immediate addressing (iii) Relative addressing (iv) Indexed addressing (v) Register indirect addressing (5) 5823 6, and the content of AC. is A137. Go over tlie instruction cycle and determine the contents of the following reg\isters at the end of the execute phase: PC, AR, DR, Acj and IR. (5) (c) Convert the following : 5. (a) What do you mean by Isolated I/0? Write its advantage and disadvantage. (4) (b) Explain the interrupt cycle with the help of a flowchart. (5 ) (c) Simplify the following Boolean function, F together with don't care conditions, d in sum-of-products form by means of a 4-variable K-map and draw the logic diagram Qf the simplified expression (I) H'ow imany 8K X 8 .RAM chips are' needed to provide a memory capacity of 32K X 16 bits? (g) Using Boolean algebra, show that : (h) Explain decoder. Draw- the block diagram of a