Introduction to Parallel Programming — DU B.Sc. (Hons) Computer Science Previous Year Question Papers

4. Parts of a question must be answered together. 1. (a) What is cache coherence? Give any two reasons why it is required in [3] shared-memory parallel systems. (b) List any three differences between Concurrent Computing and Parallel [3] (c) Coma i single Program Muliple Data (SPMD) modi? List any two (4) capabilities of SPMD model. (d) Define speedup and efficiency in parallel computing. Given a [4] computational problem with 200 operations, determine the speedup and efficiency using 50 processors, where 150 operations are executed in parallel and 50 operations are executed sequentially. (e) Describe critical section in OpenMP with the help of an example. [4] Distinguish between named and unnamed #pragma omp critical directives. (1) Explain the role of the following constructs: 14] (g) Consider a 5-stage pipelined processor consisting of Instruction Fetch [4] (IF), Instruction Decode (ID), Operand Fetch (OF), Execute (EX), and Write Back (WB) stages. The processor supports dual instruction issue per cycle. Construct the pipeline execution schedule for the following instruction sequence: a) Explain message passing protocol for buffered communication in which buffering is handled exclusively by the sending process. Explain. superscalar execution with the help of an example. List three [7] types of dependencies involved in superscalar instruction execution. a) Consider a system with a 2 GHz processor that uses DRAM with a [8] latency of 80 ns and a 64 KB cache with a latency of 0.5 ns. The system performs multiplication of two matrices A and a, each of size 64.x64, to produce a resultant matrix C, where each element occupies 8 bytes. The processor is capable of executing 8 instructions per cycle. i. Compute the total number of floating-point operations required to multiply matrices A and 8. ii. Determine the peak computational throughput of the processor in iii. Estimate the total memory required to store matrices A, a, and the resultant' matrix C. iv. Justify whether the given multiplication problem is compute-bound or memory-bound. (a) Discuss the structure of MPI_Status with the help of an example. How i7] does it enable dynamic message handling in MPI? (b) Explain the following OpenMP functions: 18] . i. omp_get_num_threads () ii. omp_get_max_threads () iv. omp_get_dynamic () 4. (a) What is the role of latency hiding in parallel computing? Give any four 17] differences between prefetching and multithreading techniques of latency hiding. (b) Consider a memory system with a single cycle cache and 120 cycle [8] latency DRAM with the processor operating at 2 GHz. If the block size is one word, the processor takes 120 cycles to fetch each word. For eact pair of words, the operations performs 2 FLOPs. Answer the following: i. Calculate the peak FLOP rate (in MFLOPS) for block size of four words. ii. Calculate the speedup achieved when block size is increased from four words to six words. Also, explain the reason for this improvement.