Fundamentals of Digital circuits (INDSC2A) — DU B.Sc. (Hons) Instrumentation Previous Year Question Papers
- Programme
- B.Sc. (Hons) Instrumentation
- Paper type
- DSC
- Paper code
- 2512041201
- Exam years
- 2025–2026
Fundamentals of Digital circuits (INDSC2A) is a DSC paper in Semester II of B.Sc. (Hons) Instrumentation at Delhi University (paper code 2512041201). 2 previous year question papers from 2025–2026 are listed below; view or download each original PDF.
2026 question papers
2026
2512041201B.Sc. (Hons) Instrumentation
2025 question papers
2025
2512041201B.Sc. (Hons) Instrumentation
What was asked in the 2026 Fundamentals of Digital circuits (INDSC2A) paper?
Text of the may june 2026 DU question paper (UPC 2512041201), so you can see what gets asked before opening a PDF.
Q.1 (a) Differentiate between sequential and combinational logic circuits (b) Define Figure of Merit and Fan Out of Logic Families. (c) Distinguish between synchronous and asynchronous counters (d) Find the characteristic equation of SR flip-flop. (e) Check whether A·C + A·B·C = A·C is true or false? (f) What is the minimum number of flip-flops needed to build a counter of modulus
(3) Q.2 (a) Convert (675.625)16 into Hexadecimal and Octal number system (b) Solve the following:
(c) Use a truth table to prove that x·(y+z) = (x·y) + (x·z) (6)
(6) Q.3 (a) (b) (c) Write the truth table and draw the circuit of a Full Adder. Design a combinational logic circuit that has four inputs A, B, C, D. The output should be high, when any two inputs are high.
What is the equivalent Product of Sum (POS) expression for the Boolean expression x'y'z + yz + xz? Also draw AOI logic circuit diagram of the given expression.
(6) Q.4 (a) Design the function
F(A,B,C) = Ʃ(1,2,5,7) using a 4 to 1 MUX
(b) (c) Implement a full subtractor using 3 to 8 line decoder and logic gates. Design a MOD-10 synchronous up counter using D Flip Flop. (6)
(6) Q.5 (a) Draw the circuit diagram and timing diagram of a MOD-6 ripple counter using negative edge triggered T flip flop.
(b) Design a 3 bit gray to binary code converter. (c) Differentiate between PLA and PAL. (8)
(4) Q.6 (a) (b) Draw the logic diagram for a 4-bit Ring counter. Also Draw the timing diagram and the sequence. Assume initial state to be 0001.
Give the circuit diagram of totem pole output of TTL NAND gate and explain its (8)
Use 2's complement subtraction to subtract (27)10 from (75)10. (4)
Q.7 (a) (b) Draw and explain the circuit of a 3-bit parallel-in-serial-out (PISO) shift register Using K-map, obtain simplified POS expressions for the following functions:
How can I prepare for Fundamentals of Digital circuits (INDSC2A)?
Related subjects in B.Sc. (Hons) Instrumentation
Frequently asked questions
- Where can I download the DU Fundamentals of Digital circuits (INDSC2A) previous year question paper PDF?
- This page lists 2 Fundamentals of Digital circuits (INDSC2A) question papers for B.Sc. (Hons) Instrumentation at Delhi University (2025–2026). Open any paper to view the original PDF or download it. It is free and needs no login.
- Which years of Fundamentals of Digital circuits (INDSC2A) question papers are available?
- Fundamentals of Digital circuits (INDSC2A) papers are available for 2026, 2025.
- What is the paper code (UPC) of Fundamentals of Digital circuits (INDSC2A)?
- The Unique Paper Code for Fundamentals of Digital circuits (INDSC2A) in B.Sc. (Hons) Instrumentation is 2512041201.
- Which semester is Fundamentals of Digital circuits (INDSC2A) taught in?
- Fundamentals of Digital circuits (INDSC2A) is a DSC paper in Semester II of B.Sc. (Hons) Instrumentation, according to DU's published scheme.
