Computer System Architecture — DU B.Sc. (Prog) Physical Science courses pertaining to Computer Science Previous Year Question Papers

Answer all parts of a question together. (e) What is Cache Memory? How is it different from auxiliary memory? (3) (1) Give any three differences between GPU and CPU. (3) (g) Convert the following decimal numbers to the bases indicated: (3) i. 724 to octal ii. 58 to binary (h) Write the characteristic tables of SR and JK flip flops. Also, draw the diagrams (3) of both the flip flops. (i) Write the microoperations required to perform ISZ instruction. (3) (i) The content of PC in the basic computer is 3AE (all numbers are in hexadecimal). (3) The content of AC is 7EC3. The content of memory at address 3AF is 832E. The content of memory at address 32E is 09AC. The content of memory at address What is the instruction (in hexadecimal) that will be fetched and executed next and identify the operation performed? ii. What will be the value of PC at the end of the instruction cycle. 2 (a) Perform the following binary arithmetic operations using 8-bit registers, given (5) that 2's complement representation is used for negative numbers: elements in sequential circuit operation with a neat block diagram. (c) List five characteristics of CISC architectures. (5) 3 State De-Morgan's law and prove it using truth table. (5) (b) Describe m x n ROM with the help of a block diagram. Differentiate among (5) (c) What is a microprogrammed control unit? Give the format of the 14-bit control (5) word and thus write the microoperations that will be executed when the following control words are applied: Given the binary code for ADD is 00101 and SUB is 01010 and three-bit binary code for selecting the register corresponds to the register number. 4 (a) A non-pipeline system takes 100 ns to process a task. The same task can be (5) processed in a five-segment pipeline with a clock cycle of 20 ns. Determine the speed-up ratio of the pipeline for 200 tasks. What is the maximum achievable speed-up? (b) Explain the control signals generated by the CPU to facilitate DMA transfer with (5) the help of a suitable diagram. (c) Draw the diagram of a 4-bit binary adder. Explain its working with the help of (5) 5 (a) Design a 2-to-4 line decoder using NAND gates and write its truth table. (5) Simplify the Boolean function given below and find the complement of the (5) simplified expression and draw the logic diagram of the original function. (c) Write the sequence of micro-operations performed during the fetch and decode (5) phases of an instruction cycle in a basic computer. Draw the flowchart for the identification of the instruction type as a Memory Reference instruction, Register Reference instruction, or Input-Output instruction. (a) Simplify the following Boolean function F together with don't care conditions: Draw the logic diagram of simplified function. (b) Consider the basic computer organization having the content of AC and E as: (5) Show the contents of AC & E after the execution of: (c) Write a short note on Programmed I/O. (5)